A bus is a highspeed path in which data travels. It can be be thought of as a pipe. The water which travels through this pipe is called data. It is a string of binary information that is needed at the other end of the pipe. The width and size of this pipe is the number of bits that can be transfered at a time. The overall amount of data that can be transfered per second is called bandwidth. Most high speed buses have 32-bit widths, and with some having even more. The advantages of a wide width is that a lot of data can flow through it at once. The downside, which is often the limit for the bus width, is the physical size which a bus has. The water pressure in the pipe would be the frequency. Even a small bus width is capable of high bandwidth, if its frequency is high enough.

Industry Standard Architecture

ISA was released with the first IBM PC. The oldest implimentation was as a 8-bit bus running at 4.77MHz. ISA went through a couple upgrades, first up to 16-bits. A few speed increases, 6MHz up to 8MHz, and again up to 8.33MHz. ISA is still used today in systems for legacy support for older devices, although it is on its last leg.

A final advancement was made to the ISA bus, it was increased to be 32-bits wide and operating at the same at the same 8.33MHz frequency. This was to ensure backwards compatibility with old ISA devices. EISA was developed around the same time as the MCA by Compaq as a high bandwidth solution to the aging and slow ISA. It featured double the bandwidth of the ISA bus, and nearly that of the MCA, IRQ sharing and a basic implementation of plug-and-play. EISA was a great step in the right direction, but because it suffered from numerous technical problems it was never looked at as a practical solution.

Introduced by IBM, MCA was a 32-bit with plug and play and bus master architecture. It was used only in IBM PS/2 systems, and few other companies because IBM was a forcing other companies to pay a royalty to use it. The MCA was introduced around the same time as EISA, but neither formats were ever used extensivily in the computer industry.

VL-Bus was a new technology that instead of communicating to the CPU through the core logic chipset like the other buses, VL-Bus tapped directly into the front side bus. This was a very strict standard because devices had to be very well behaved. There was no longer a chipset to moderate the devices. Although directly connecting devices to the CPU proved to be a fast bus, it would place a lot of strain on the CPU by creating electrical issues. This limited the performance at which the bus could run, and also limited the number of VL-Bus devices in a system to two. The speed of this bus was the same as the front side bus, so in most 486's that meant a 32-bit 33MHz bus. VL-Bus cards pluged into the motherboard through regular ISA slots, but had a special connector which was plugged into a special connection on the motherboard so that the card could gain access to the FSB.

The PCI bus was introduced by Intel in 1992 as a replacement to the VL-Bus. Instead of connecting components directly to the FSB like the VL-Bus, the PCI bus used a special connection through the northbridge, which still allowed them dedicated access to the CPU and main memory. The PCI bus is faster than the VB-Bus, and suffered none of the electrical problems that plagued the VL-Bus. These factors made the PCI bus catch on rather quickly, and it is still used today in all x86 systems.

PCI 2.0
At introduction, the PCI bus operated at a 32-bit 33MHz bus, just like th VL-Bus, except now the FSB operated at twice that speed, 66MHz.

PCI 2.1
PCI 2.1 specification is for a 66MHz 32-bit bus. This doubles the effective speed of the bus, but takes limited hardware modifications to accieve. Many older video cards were sold for this format, but this later evolved into AGP.

PCI 2.2
PCI 2.1 specification calls for a 66MHz 64-bit bus. This is used in high end servers for connections like Fibre Channel, SCSI, or Ethernet.

Because the PCI bus is limited to approximately 127MB/sec for all devices, there was a need for a faster bus for use by the video card. Unlike hard drives or sound cards, video cards have to make frequent accesses to main memory, along with large texture transfers. The AGP specification was only for a dedicated 66MHz PCI bus for the video card, and was very similar to the PCI2.1 specification. Along with extra speed and dedicated memory access, AGP had more beneficial features. These included AGP texturing, sidebanding, write combining, and fast writes.

AGP texturing
This is a faster form of PCI texture prefetching. It would access the needed textures from memory instead of the onboard video RAM. This is often to slow to work well, even with the AGP's dedicated access and AGP4X.

The original AGP interface only operated as a 32-bit 66MHz bus. It was quickly revised into a 32-bit 133MHz which was capable of 2 complete transfers per clock. This was called AGP2X because it was 2X as fast as the original. This raised the bandwidth from the AGP's 254MB/sec to 508MB/sec. If this wasn't enough, the bus has been expanded to make use of 4 complete transfers per clock in a AGP4X specification. The bus now operates as a 32-bit 266MHz bus with bandwidth up to 1007MB/sec. Most newer computers are using the AGP4X format, but the AGP2X is still very common.

Sidebanding
This is the the process which overlaps requests from the video card to the northbridge. This can provide a speed increase, but is know to cause problems with some video cards.

Write combining
This is the practice that allows the merger of multiple requests or operations into a single read or write, fully taking advantage of AGP's extra bandwidth. This is a significant speed increase, and unlike sidebanding and fast writes, it will not cause problems with the video card stability.

Fast Writes
This is where the CPU is allowed to make requests directly to the AGP card rather than put it in the video card's buffer. Fast writes are not supported by all cards, and are know to cause severe stability problems with some configurations. They also offer only small performance gains, and can be used only in specific situations. Therefore this feature is rarely implemented.

This architecture is used with Rambus enabled motherboards. Instead of a northbridge and a southbridge, there are 2 hubs which operate in the same manner. The only difference is that instead of connecting the two by using a 8-bit high speed bus operating at 133MHz. This allows the Rambus to effectivily transfer its information from one of its channels, while simultaniously transfering to another bus through the north hub.