The first types of DRAM were asynchronous to the clock speedf the bus they were connected to. This meant that they opperated at the speed that they wanted to. The later DRAM types are syncronous, meaning that they opperate, or at least try, to opperate at the speed of the bus they are connected to. If syncronous DRAM is unable to keep up to the speed of the bus they are connected to, than they won't work at all. Each step in syncronous memory is allocated a specific number of clocks For example CAS2 ram is allowed 2 clock cycles to perform Column and then cell access. If the clock cycles are too short to perform this operation errors occur. On the other side, for asyncronous memory, the DRAM always operates at the same speed no matter what the clock speed of the bus is, and will input wait clocks to the bus until it has finished and is ready for the next request. Something also to note is the difference between the time rating for syncronous and asycronous memory. Asycronous memory time is reported for the length of thime needed by the DRAM between when the request is made and when the output is available. And Example is EDO DRAM rated at 70ns will take 70ns to complete one entire access cycle. Syncronous memory time is reported as the time it takes to burst the information from the memory cells to the bus. It excludes the time it takes to access it. An example is 10ns SDRAM, 10ns is equal to one 100MHz clock cycle.
Page Mode DRAM
This is the first real type of DRAM. It was very slow because for every bit of information both the RAS and CAS line locations needed to be sent. This would take upwards of 120ns for each access.
Fast Page Mode DRAM
This improved on Page Mode DRAM in that the RAS location wasn't needed for consecutive accesses to the same RAS line. Therefore one RAS location could be sent, and the CAS lines could be pulsed in to continue the access without a delay. There was also a speed increase in access times from 120ns to 60ns. This would only allow operation on a 28MHz bus without the use of wait states. Some newer FPM DRAM took advantage of faster timing curcuits and added an output buffer so that the output could pile up there while the next access was being started. This buffer would allow the chip to start on the next request without having to wait for the memory bus to be ready for its previous output. This was a very primative form of pipelining, but it did give this newer version of FPM DRAM a significant speed increase. FPM DRAM would operate at only 5-3-3-3 timing on a 66MHz bus.
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Extended Data Out DRAM
As computers started to use a 66MHz bus, FPM DRAM proved to be too slow. So a small improvement to it was added, the ability to send the next CAS location before the previous access was complete. This would allow some what of an overlap in CAS cycles. The net effect of EDO DRAM was the ability to make CAS cycles shorter, while still allowing them the same amount of time to complete. This was available in some newer forms of FPM, but EDO made it "official". The major advancement in EDO was its speed. EDO DRAM was designed to operate at 40MHz with zero wait states, but was commonly used with 66MHz buses with wait states enabled. It would operate at 5-2-2-2 burst timings at 66MHz.
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Burst Extended Data Out DRAM
BEDO DRAM never really caught on because the far superior SDRAM was soon introduced as its replacement. BEDO would "burst" information out quicker after the first access, allowing a timing of 5-1-1-1 on a 66MHz bus. What it did was fully pipeline the memory access procedure, by dividing the access into steps. Each step wouldn't have to worry about the previous step or the next step because all of it's output would be stored in a buffer, and all of its input would be taken from the previous step's buffer. Also, BEDO's input memory latch was replaced by a register, allowing faster access and removing the need to send continous CAS signals for a 4 word burst. The burst would increment the register on its own, or the burst could be cut short if a new value was detected. BEDO speed topped out at 66MHz with zero wait states.
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Synchronous DRAM
Syncronous DRAM is what is used in almost all of todays computers. It has no problem reaching speeds of 133MHz and above.
One advantage of Synchronous ram is that it allows two banks, each with two rows in memory to be open simultaneously. This saves time in executing commands and transmitting of data. Being able to switch, also know as interleaving, between banks can hide row precharge/refresh, and first access delays. It allows one bank to be precharging (RAS and CAS activation), while the second bank is transfering data. What this means is that there can be a constant flow of input/output, and able to exploit the maximum amount out of the RAM.
Another feature of SDRAM is the use of a SPD, short for serial presence detect chip on the ram DIMM that will provide basic information about the RAM to the motherboard, such as timing, speed, manufaturer, and so forth. SDRAM contains the same ability to burst data as BEDO does, multiple RAS and CAS lines do not need to be sent, the DRAM knows enough to burst out the adject cells.
SDRAM is available in either PC66 (66MHz), PC100 (100MHz), or PC133 (133MHz) with CAS timings of either 2 or 3. This yields a bandwidth of 528MBps, 800MBps, and 1064MBps respectivily.
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Double Data Rate Synchronous DRAM
This is very similiar to SDRAM, execept data is transfered twice per clock, on both the rising edge and falling edge. This effectivily doubles the bandwidth that the chip has.
DDR SDRAM will soon be available as system RAM, and DDR is currently being used on high performance video cards were a lot of bandwidth is needed.
RAMBUS DRAM
This is a different approach to the way that memory is constructed. Instead of using a 64bit bus to transfer data, a narrower 16bit bus is used at a very high clock speed. Rambus memory is Double Data Rate, and was designed for optimum bandwidth at the cost of latency.
Rambus DRAM is available in PC800, (400MHz DDR) with a bandwidth of 1.6GBps (1600MBps).
Video DRAM
This type of memory is used only in high performance video cards. It is different than normal SDRAM in that it is dual ported. This means that it is able to be read from and written to at the same time. This was nessisary to keep up with the outputed needed to redraw the information on screen, but still be able to update the information without interuption.
