Chip Pin-Out

These are the pins for 16 k X 1-bit chips. What this notation means, is that the chip contains 16k of data, and is able to store 1 bit of data per cell. This does not mean that there are 16000 cells. There are actually 16384. This is because there are 14 address pins, (7 multiplexed pins in DRAM), and this creates an array of 2¹⁴ cells. Most pins are activated with a 1 or high signal, and deactivated with a 0 or low signal. Exceptions to this are pins that have been over lined. Another notation for over lining is to use a / before the pin. An example is WE is the same as /WE.

Address Pins

These pins are used to send to the chip the array coordinates of the information that is to be read/written.

In SRAM chips, half of the address pins are used for the RAS signals and the other half are used for the CAS signals.

In DRAM chips, the address pins are Multiplexed, meaning that the same pins are used for both the RAS and CAS signals. The way that this works is that the RAS signals are sent first and are indicated by activating the RAS pin. The CAS signals are sent in a later clock cycle, and are indicated to the chip by activating the CAS pin.

D_OUT (Data Output)

This is the pin used to output the value of the selected cell during a read request. The cell location is indicated by the RAS and CAS values.

D_IN (Data Input)

This is the pin used to output the value of the selected cell during a write request. The cell location is indicated by the RAS and CAS values.

WE (Write Enable)

This is the pin used to tell the chip that information will be written to a cell, rather than output.

CS (Chip Select)

Since multiple RAM chips are connected to the same address and data buses, this pin is used to distinguish which chip is suppose to be used.

GND (Ground)

This pin serves as a ground to the chip.

V_CC (Voltage)

This pin supplies the chip with the power that it needs to operate.

RAS (Row Address Strobe)

This is the pin is only found on DRAM, and not SRAM. It is used to tell the chip that the information that is recieved via the address bus is the row address to be used.

CAS (Column Address Strobe)

This is the pin is only found on DRAM, and not SRAM. It is used to tell the chip that the information that is recieved via the address bus is the column address to be used.

Pin Differences

SRAM is large and bulky, each cell is made of 4 transistors and 2 resistors. DRAM is small and compact, each of its cells are made of only 1 transistor and 1 capacitor. SRAM has an address pin for both RAS and CAS locations. These means a chip with 128 rows and 128 columns, and a total of 16384 cells would have 7 pins for RAS signals and 7 rows for CAS signals. This is because there are 128 different combinations for the values of the 7 pins. Each pin can be either on or off, so for 2 pins there would be 4 combinations. One pin could be on, the other could be on, both could be on, or neither could be on. This is ok for SRAM, but bad for DRAM. DRAM is a lot smaller and more cells can fit on each chip. A 16MB chip is not uncommon, and that would require 24 address pins. That is too many pins for a chip so the address pins are multiplexed. This means both the RAS and CAS signals use the same pins, so a 16MB DRAM chip would only need 12 address pins instead of 24. This not only saves on pins but allows CAS signals to be sent continuously which is required for BEDO and S DRAM types.