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Self Modifying Code

Self modifying code was a great idea, back in the days when a fair amount of assembler code was written. Self modifying code is a process in which an upcoming instruction is modified before it is reached. When CPU's were not pipelined, it was easy to determine whether the instruction was reached yet or not.  Basically, only the current instruction was being executed, so all future instructions had not been reached yet. With this design guideline, programmers can do some pretty tricky things. In a lot of code, the opcode of a branch instruction is changed to that of a nop (no operation) instruction. This allows, at runtime, for a branch always (jump) or even a branch conditional to effectively be changed into a branch never. This is useful for determining at runtime what portions of a program are to be executed and then the branches are changed as needed so only those portions are executed.
The down side to self modifying code is there aren't any current high-level programming languages that allow you to create self modifying code (except maybe C but it would be rough). It is still used today, but mostly only to patch parts of a program. Many CISC chips were designed before it was known how much more difficult pipelining support is on processors that completely support self modifying code. Most RISC processor designs place limitations on how self modifying code sequences are performed. For instance, they typically require that the instruction being modified must be at least some number of instructions away from the instruction that causes the modification. Normally the number of instruction is specified to be one more than the number of stages in the processors pipeline. In this manner the processor does not have to worry about an instruction being modified that is already in the pipeline. Most CISC processors did not require this limitation during there initial release. They therefore must still support this operation, even though it significantly complicates the circuitry needed to support pipelining.
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