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One thing that all computers can do is add. Other operations do not need to be implemented, since all operations can be expressed in terms of addition: subtraction is the same as adding a negative number, multiplication is the result of multiple additions, and division is the result of multiple subtractions. Addition is handled by the ALU (Arithmetic Logic Unit), but the ALU handles other functions; thus we will call the adding part of the ALU the "adder". Addition of two bits proceeds as following: if both are 0, then the result is 0; if both are 1, the result is also 0 (and a carry bit); if only one of the two is 1, the answer is 1. This situation brings to mind the XOR (exclusive OR) operation. The result of adding two bits is the same thing as XORing them. However, a situation arises when both of the bits are 1. The resulting bit is still 0, but there is a carry bit that has to be sent on to the next addition. Thus, addition consists of XORing the two bits, and then ANDing them to obtain the carry bit. Look at the diagram below for an electronic representation of the above paragraph.
Above is described a method for adding two bits together. In most situations, however, this is not enough. Many bits need to be added to many other bits. Consider the signed binary numbers 11001011 and 11010011. When these are added, the adder will first have to add the right-most bits, carry an extra 1 over to the next operation and so on as shown in the diagram below.11001011 +11010011 --------- 10011110As you can notice, there should have been a ninth bit at the end. This bit was ignored, simply because the adder that computed this operation could only handle 8 bits (hence an 8-bit adder).
The circuitry involved in creating a 1-bit adder is rather simple. A diagram is shown below. There is an XOR gate that performs the addition, and an AND gate that contains the carry bit (the carry bit is only set when both of the bits are 1).
A B Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
A multi-bit adder adder does not require much more circuitry. The only improvement that it must have over the 1-bit adder is that it has to account for the carry bit coming from the previous bit addition. The change is that after the first adder, there needs to be another one (since we are adding the carry bit in addition to the regular two bits). Since there can be only one carry bit for the operation, and both of the adders can yield a carry bit, both carry bits need to be OR'ed together to be taken into account. See below for the diagram of a single part of a multi-bit adder.
A B Carry In Sum Carry Out 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1
Subtraction is very similar to addition. Looking at the table located on the Binary System page displaying binary digits, you may notice that NOT (1) is the same thing as -2, NOT (20) = -21, etc. This is called the one's complement. The two's complement is when you add one to the one's complement. When the two's complement is taken of a number, it gives the negative version of that same number, as demonstrated (i.e. the two's complement of 1 is -1). Since we already know how to add two numbers, subtracting them is nothing more than taking the two's complement of the number that is being subtracted, and adding it to the number that is being subtracted from (e.g. 1-2 is the same thing as 1+(-2)).
Bit shifting is a practice to shift bits in a certain direction by 1. For example, 10010111 shifted to the right would be the same as cutting the rightmost bit off. Since the length of 8 has to be maintained, the result would be 01001011. The importance of shifting is that it is basically a multiplication or a division by 2. 10010111 in binary is the same as 151 when the sign bit is not considered. The number 01001011 is 75, which is 151/2 without the remainder. Shifting to the left would present the same result, except that it would multiply by 2 instead of dividing. The circuitry for the shifter is somewhat trickier than that of the adder. The image below is a 4-bit shifter. Basically, there are two lines on the top (the enable lines), that will either tell the shifter to shift left or right. This depends on the variable C. As you can see, due to the fact that one of the enable lines is C, and the other one is NOT C, there can only be one enable line enabled at a time. If the shift is to the left, the circuit output ignores the leftmost input bit, and ignores the rightmost input bit if the shift is to the right. The OR gates are there as a result of two wires going into the same place. Only one of these wires (if any) should contain a 1.
Now you can go on to the Arithmetic Logic Unit section. [an error occurred while processing this directive]